| Position | Senior Design Engineer |
| Posted | 2025 October 05 |
| Expired | 2025 November 04 |
| Company | Xinyx Design Consultancy & Services, Inc. |
| Location | Muntinlupa, Metro Manila | PH |
| Job Type | Full Time |
Latest job information from Xinyx Design Consultancy & Services, Inc. for the position of Senior Design Engineer. If the Senior Design Engineer vacancy in Muntinlupa, Metro Manila matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.
Please note that applying for a job may not always be easy, as new candidates must meet certain qualifications and requirements set by the company. We hope the career opportunity at Xinyx Design Consultancy & Services, Inc. for the position of Senior Design Engineer below matches your qualifications.
Xinyx Design Consultancy & Services, Inc. NegotiableOn-site - Muntinlupa 5-10 Yrs Exp Bachelor Full-timeOverviewThe Senior Digital Implementation Engineer is responsible for the end-to-end digital implementation of complex ASIC designs, including synthesis, place and route, and timing closure. This role requires strong technical skills and experience in digital design methodologies, along with a proven ability to work in a collaborative environment.
The ideal candidate will lead implementation projects, mentor junior engineers, and drive continuous improvements in digital design flows and methodologies. ResponsibilitiesDigital Design Implementation: Lead the synthesis, place and route, and optimization of complex digital designs, ensuring high performance, area efficiency, and low power consumption. Timing Closure: Perform static timing analysis and drive timing closure efforts for digital designs, identifying and resolving timing issues across multiple corners.
Collaboration: Work closely with RTL designers, verification engineers, and physical design teams to ensure smooth integration and compliance with design specifications. Methodology Development: Develop and improve digital implementation methodologies and flows, including best practices for synthesis, place and route, and DFT.Tool Utilization: Utilize EDA tools (e.g., Synopsys Design Compiler, Cadence Innovus, or Mentor Graphics) effectively for implementation tasks and drive automation efforts for increased efficiency. Debugging and Troubleshooting: Identify and resolve implementation issues, including signal integrity, DRC/LVS errors, and timing violations, through thorough debugging and analysis.
Documentation: Maintain comprehensive documentation of design processes, methodologies, and project deliverables, ensuring traceability and knowledge sharing. Mentorship: Provide technical guidance and mentorship to junior engineers, fostering their growth in digital design implementation and best practices. QualificationsBachelor's in Electrical Engineering, Computer Engineering, or a related field.
Master Degree is a plus5-8 years of experience in digital design implementation, with a strong background in ASIC or FPGA design flows. Proven experience with multiple complete design cycles, from RTL to GDSII.Proficiency in RTL design languages (Verilog/SystemVerilog) and strong understanding of digital design concepts. In-depth knowledge of synthesis, place and route, and static timing analysis methodologies.
Familiarity with design for test (DFT) methodologies and tools. Experience with EDA tools (e.g., Synopsys Design Compiler, Cadence Innovus, Mentor Graphics). Strong scripting skills (e.g., Perl, Tcl, Python) for automation and tool integration.
#J-18808-LjbffrAfter reading and understanding the criteria and minimum qualification requirements explained in the job information Senior Design Engineer at the office Muntinlupa, Metro Manila above, immediately complete the job application files such as a job application letter, CV, photocopy of diploma, transcript, and other supplements as explained above. Submit via the Next Page link below.
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